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The development and debugging of the model of microprocessor based on MIPS architecture and its realisation on the field-programmable gate array (FPGA)

Abstract

The development and debugging of the model of microprocessor based on MIPS architecture and its realisation on the field-programmable gate array (FPGA)

Tsarinzhapov A.A., Koshevenko A.V.

Incoming article date: 10.06.2018

The relevance of modeling, design of digital devices and further synthesis of it on FPGA are substantiated in this article. This approach is demonstrated by example of microprocessor with famous architecture MIPS on the VHDL language. The further modeling, synthesis on FPGA by Altera and test on the specific example confirm the opportunity of prototyping real digital devices with the introduсed method.

Keywords: microprocessor, test, programmable logic integrated circuit, digital device, verification, model, hardware description language, field-programmable gate array,pipeline ,MIPS