In this paper, the problem of an equalizer design for high-speed receiver channel which is designed to compensate for the uneven frequency response of the input differential signal. Using special design methods, as well as modeling tools for frequency and transient characteristics, an equalizer with the ability to digitally adjust the gain was developed. This adjustment also reduces the impact of the spread of process parameters, which is inevitable during the production of the chip.

Keywords: attenuation, transceiver, equalizer, IP block, equalization, gain, amplitude